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| 1 motorola analog ic device data
designed for automotive ignition applications in 12 v systems, the mc33094dw provides outstanding control of the ignition coil when used with an appropriate motorola power darlington transistor. engine control systems utilizing these devices for ignition coil control exhibit exceptional fuel efficiency and low exhaust emissions. the device is designed to be controlled from a singleended hall sensor input. the circuit is built using highdensity integratedinjection logic (iil) processing incorporating high currentgain pnp and npn transistors. the mc33094dw is packaged in an economical surface mount package and specified over an ambient temperature of 40 c to 125 c with a maximum junction temperature of 150 c. ? external capacitors program the devices timing characteristics ? overvoltage shutdown protection ? auto startup capability after overvoltage condition ceases ? allows for push startup in automotive applications ? ignition coil current limiting ? ignition coil voltage limiting ? band gap reference for enhanced stability over temperature ? negative edge filter for hall sensor input transient protection ? hall sensor inputs for rpm and position sensing ? 40 c t a 125 c ambient operating temperature maximum ratings (all voltages are with respect to ground, unless otherwise noted.) rating symbol value unit power supply voltage v cc 28.6 v junction temperature t j 150 c operating ambient temperature t a c continuous 30 to 105 limited 40 to 125 storage temperature t stg 55 to 150 c operating frequency range f op 1.0 to 400 hz soldering temperature t solder 270 c so16l (for 10 seconds) thermal resistance r q ja 97 c/w junctiontoambient (so16l) note: esd data available upon request. order number: mc33094/d rev. 0, 06/2001 semiconductor technical data pin connections device operating temperature range package semiconductor technical data ignition control ordering information PC33094DW t a = 40 to +125 c so16l dw suffix plastic package case 751g (so16l) 16 1 (<= *73c # "/?@3> 7/? " 2/=@7b3 /=/17@<> > mc33094 2 motorola analog ic device data * 7; '+ 5;7@7<; * 0/@ "/?@3> 7/? /;2 /= &343>3;13 * 9/:= /;2 .3;3> &34 ;=a@ <:= /;2 #35/@7b3 253 79@3> $a@=a@ a>>3;@ >7b3> /;2 !7:7@3> '@/99 /=/17@<> 2/=@7b3 /=/17@<> &/:= /=/17@<> & <:=/>/@<> ;@3>;/9 !<571 simplified ignition circuit this device contains ??? active transistors. 8 electrical characteristics (characteristics noted under conditions 6.0 v v d = v cc 16 v, 40 c t a 125 c, unless otherwise noted. typical values are specified for t a = 25 c.) characteristic symbol min typ max unit supply and master bias supply current (v cc = 16 v, v in() = 0 v, v d = 3.0 v, i cc 5.0 8.4 18 ma v ca = v cr = v cs = v st = open) (note 1) overvoltage shutdown (v in() = 0 v, v ca = v cr = open, v cc3 23.7 27.5 31 v v cs = 3.0 v, v st = 28 v) (note 2) startv cc latch (v in() = 0 v, v ca = v cr = v cs = open, v cc5 8.0 16.1 v v st = 25 v, v d = 14 v, i st = 40 ma) adaptive dwell high supply voltage (v in() = 11 v, v ca = open, v v cr = 3.0 v, v cs = 3.0 v, v st = 6.0 v, v d = 13 v) threshold (note 3) v cc1 16.5 18.9 19.5 hysteresis (note 4) v cc2(hys) 0.2 0.5 0.8 master bias voltage (v cc = 16 v, v in() = 0 v, v d = 3.0 v, v mb 1.12 1.2 1.32 v v ca = v cr = v cs = v st = open) (note 5) notes: 1. current sourced into supply pin. 2. ramp up v cc from 24 to 31 v in 0.1 v increments and note the supply voltage, v cc , which causes v o to fall below 1.0 v. 3. ramp up v cc from 14 to 20 v in 0.1 v increments and measure v cc when i ca 2.0 m a. 4. ramp up v cc from 20 to 14 v and measure v cc when i ca 2.0 m a and compute hysteresis difference from v cc1 . 5. voltage measured at master bias pin. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . mc33094 3 motorola analog ic device data electrical characteristics (characteristics noted under conditions 6.0 v v d = v cc 16 v, 40 c t a 125 c, unless otherwise noted. typical values are specified for t a = 25 c.) characteristic symbol min typ max unit inputs input positive threshold voltage (v cc = 6.0 v, v ca = v cr = open, v in()(th)a 50 54 65 %v cc v cs = 1.0 v, v st = 6.0 v) (note 1) input positive threshold voltage (v cc = 16 v, v ca = v cr = open, v in()(th)b 50 54 65 %v cc v cs = 1.0 v, v st = 10 v) (note 2) input hysteresis (v cc = 6.0 v, v ca = v cr = v cs = open, v in()(hys)a 0.6 0.72 1.2 v v st = 6.0 v) (note 3) input hysteresis (v cc = 16 v, v d = 3.0 v, v in()(hys)b 1.6 2.23 3.2 v v ca = v cr = v cs = open, v st = 10 v) (note 4) input impedance (v cc = 14 v , v in() = 10 v , v d = 3.0 v, z i 70 94 250 k w v ca = v cr = v cs = v st = open) (note 5) notes: 1. ramp up v in() from 1.0 to 5.0 v in 0.1 v increments. record v in() when i cr goes positive and convert to % of v cc by dividing by v cc . 2. ramp up v in() from 3.0 to 10 v in 0.1 v increments. record v in() when i cr goes positive and convert to % of v cc by dividing by v cc . 3. ramp up v in() from v in()(th)a in 0.01 v increments. record v in() when i ca goes positive. v in()(hys)a = v in()(th)a (v in() ). 4. ramp up v in() from v in()(th)b in 0.01 v increments. record v in() when i ca goes positive. v in()(hys)b = v in()(th)b (v in() ). 5. measure i in() into pin 7; z i = 10 v/i in() . * 7; * * ' * ' w * $ * ! w w * * 8 w 8 w '( * '( * 8 w * " * * *& * * 7; * ! * * & 7; w w * ' # # figure 2. test circuit # electrical characteristics (characteristics noted under conditions 6.0 v v d = v cc 16 v, 40 c t a 125 c, unless otherwise noted. typical values are specified for t a = 25 c.) characteristic symbol min typ max unit output and dwell output current (v in() = 0 v, v ca = v cr = open, ma v cs = 3.0 v, v st = 10 v, v o = 2.1 v) (note 1) normal condition (v cc = 14 v, v d = 6.0 v) i o1 40 52 65 high voltage condition (v cc = 14 v, v d = 22 v ) i o2 40 55 65 output leakage current (v cc = 14 v, v in() = 10 v, i o3 1.0 1.33 100 m a v ca = v cr = v cs = open, v st = 10 v, v s = 0 v, v d = 18, v o = 0 v) (note 2) output clamp voltage (v cc = 14 v, v in() = 10 v, v cl 13.7 14.52 15.58 v v ca = v cr = v cs = open, v st = 10 v, v d = 14 v, v o = 0 v, v cl = 20 v, i cl = 10 ma) (note 3) output clamp dynamic impedance (v cc = 14 v, v in() = 10 v, z cl 10 37 75 w v ca = v cr = v cs = open, v st = 10 v, v d = 14 v, v o = 0 v, i cl = 12 ma, d i cl = 2.0 ma) (note 4) dwell (note 5) % normal condition: d1 = (i ca2 /i ca1 ) x cr d1 14.5 17.6 20.5 data from i ca2 , i ca1 , and cr characteristics high voltage condition: d2 = (i ca3 /i ca1 ) x cr d2 4.1 5.3 5.9 data from i ca3 , i ca1 , and cr characteristics notes: 1. capability measured by forcing the output to 2.0 v with current sense pin (is) open while measuring the output current to gro und. 2. measured by clamping the output to that output voltage with is pin to ground; then increasing v d from 6.0 to 18 v and measuring output leakage current to ground. 3. output clamp voltage with reference to ground while forcing 10 ma into the dynamic clamp pin (cl). 4. output clamp impedance measured with i cl = 11 1.0 ma into the dynamic clamp pin (cl) and noting the corresponding output clamp voltage change (z cl = d v cl / d i cl ). 5. dwell is defined as run mode down current divided by the run mode up current times the ramp control current ratio and is calc ulated from other measured characteristics as defined above. 6. set the v cr voltage to 1.5 v; ramp v cr voltage from 1.8 to 2.2 v in 0.02 v increments and note the ramp voltage (v cr ) which causes the output voltage to go > 1.0 v; v cro = 2.0 v v cr . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . mc33094 5 motorola analog ic device data electrical characteristics (continued) (characteristics noted under conditions 6.0 v v d = v cc 16 v, 40 c t a 125 c, unless otherwise noted. typical values are specified for t a = 25 c.) characteristic unit max typ min symbol output and dwell adaptive dwell logic, ramp threshold (v cc = 14 v, v in() = 10 v, v cro 60 0 60 mv v ca = v cs = open, v st = 0 v, v d = 10 v, v s = 0 v) (note 6) soft shutdown voltage (v cc = 6.0 v, v in() = 10 v, v ss 0 1.48 16.7 mv v ca = v cr = v cs = open, v st = 0 v) measure v s notes: 1. capability measured by forcing the output to 2.0 v with current sense pin (is) open while measuring the output current to gro und. 2. measured by clamping the output to that output voltage with is pin to ground; then increasing v d from 6.0 to 18 v and measuring output leakage current to ground. 3. output clamp voltage with reference to ground while forcing 10 ma into the dynamic clamp pin (cl). 4. output clamp impedance measured with i cl = 11 1.0 ma into the dynamic clamp pin (cl) and noting the corresponding output clamp voltage change (z cl = d v cl / d i cl ). 5. dwell is defined as run mode down current divided by the run mode up current times the ramp control current ratio and is calc ulated from other measured characteristics as defined above. 6. set the v cr voltage to 1.5 v; ramp v cr voltage from 1.8 to 2.2 v in 0.02 v increments and note the ramp voltage (v cr ) which causes the output voltage to go > 1.0 v; v cro = 2.0 v v cr . electrical characteristics (characteristics noted under conditions 6.0 v v d = v cc 16 v, 40 c t a 125 c, unless otherwise noted. typical values are specified for t a = 25 c.) characteristic symbol min typ max unit adaptive capacitor run mode, adaptive capacitor, charge current (v cc = 6.0 v, i ca1 7.91 6.53 5.62 m a v in() = 5.0 v, v ca = open, v cr = 3.0 v, v cs = 3.0 v, v st = 6.0 v) (note 1) run mode, adaptive capacitor, discharge current m a (v ca = open, v cs = 3.0 v, v cr = 3.0 v, v st = 6.0 v) normal condition (v cc = 6.0 v, v in() = 10 v) i ca2 3.7 4.77 5.63 high voltage condition (v cc = 22 v, v in() = 17 v, v d = 13 v) i ca3 1.05 1.43 1.82 start mode, adaptive capacitor currents m a (v ca = v cr = v cs = open, v st = 10 v) charge current (v cc = 5.0 v, v in() = 10 v) (note 2) i ca4 112 87 80 discharge current (v cc = 6.0 v, v in() = 0 v) (note 3) i ca5 67.6 89.4 109 start mode, adaptive capacitor, clamp voltage v (v cc = 6.0 v, v ca = v cr = v cs = open, v st = 10 v) high clamp voltage (v in() =10 v) v ca1 2.23 2.39 2.65 low clamp voltage (v in() = 0 v) v ca2 0.95 1.1 1.26 adaptive gain (v cc = 14 v, v in() = 11 v, v st = 6.0 v, ag 0.85 0.99 1.15 times v ca = open, v cr = 3.0 v, v cs = 3.0 v , v d = 13 v) (note 4) notes: 1. open v cr initially then force v cr = 3.0 v and measure i ca1 . 2. start mode adaptive control sourcing current. 3. start mode adaptive control sink current. 4. measure i ca . calculate: ag = i cr1 /i ca . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . mc33094 6 motorola analog ic device data electrical characteristics (characteristics noted under conditions 6.0 v v d = v cc 16 v, 40 c t a 125 c, unless otherwise noted. typical values are specified for t a = 25 c.) characteristic symbol min typ max unit stall capacitor start mode, stall control, charge current (v cc = 5.0 v, v in() = 0 v, i cs1 2.7 2.33 2.13 m a v ca = v cr = open, v cs = 1.0 v, v st = 10 v) run mode, stalled, stall control, discharge current (v cc = 14 v, i cs2 7.5 9.69 13.2 m a v in() = 0 v, v ca = v cr = open, v cs = 1.0 v, v st = 0 v) run mode, stall control, charge current (v cc = 14 v, v in() = 10 v, i cs3 33.1 27 23.5 m a v ca = 2.0 v, v cr = 3.0 v, v cs = 1.0 v, v st = 0 v) run mode, stall control, discharge current (v cc = 14 v, i cs4 0.76 1.02 1.26 m a v in() = 10 v, v ca = 2.0 v, v cr = open, v cs = 1.0 v, v st = 0 v, v mb = 0 v) stall control threshold voltage (v cc = 14 v, v in() = 0 v, v cs1 1.95 2.06 2.45 v v ca = v cr = open, v st = 0 v) (note 1) stall control saturation voltage (v cc = 14 v, v in() = 0 v, v cs2 20 35.3 165 mv v ca = v cr = v cs = open, v st = 0 v) (note 2) notes: 1. ramp v cs from 1.5 to 2.5 v in 20 mv steps. record v cs when i cs goes negative. 2. set v st = 10 v, v cs = 1.0 v, fail if output is on. set v cs = 3.0 v, fail if output is off. electrical characteristics (characteristics noted under conditions 6.0 v v d = v cc 16 v, 40 c t a 125 c, unless otherwise noted. typical values are specified for t a = 25 c.) characteristic symbol min typ max unit ramp capacitor ramp control current ratio (v cc = 14 v, v in() = 0 v, cr 22 24.3 28 % v cr = 3.0 v, v st = 0 v, v ca = v cs = open) (note 1) ramp capacitor reset hysteresis (v cc = 14 v, v in() = 10 v, v cr(hys) 6.0 19.19 180 mv v ca = 2.0 v, v cs = 3.0 v, v st = 6.0 v) (note 2) notes: 1. set v ca to 0.5 v, then open v ca . set v cr to 0.9 v. percent ratio of cr up current as compared to the cr down current; (i cr1 /(i cr1 i cr2 ) x 100). 2. open v cr , force v cr = 1.3 v. ramp v cr down in 3.0 mv steps until i cr goes negative, v cr1 . ramp v cr up in 3.0 mv steps, toggle input between steps, until i cr goes positive, v cr2 . v cr(hys) = v cr2 v cr1 . electrical characteristics (characteristics noted under conditions 6.0 v v d = v cc 16 v, 40 c t a 125 c, unless otherwise noted. typical values are specified for t a = 25 c.) characteristic symbol min typ max unit timing negative edge filter, falling edge time constant (v cc = 16 v, t 1 400 613.65 1000 m s v in() = 0 v, v ca = v cr = v cs = open, v st = 10 v) (note 1) propagation delay time (v cc = 14 v, v in() = 10 v, t 2 0 3.45 15 m s v ca = v cs = open, v cr = 3.0 v, v st = 0 v) (note 2) start delay, positive edge t sdp 1.15 1.46 1.71 ms (data from i ca4 , v ca1 , v ca2 ) (note 3) start delay, negative edge t sdn 1.19 2.06 2.8 ms (data from tests v ca1 , i ca5 , v ca2 , t 1 ) (note 4) start to output disable time (note 5) t sod 71 87 107 ms stall to spark output propagation delay t ssd 4.6 7.48 8.8 ms (data from tests i cs3 , v cs1 , v cs2 ) (note 6) notes: 1. measure time until v o > 0.2 v. the negative edge filter prevents multiple output sparks caused by switching transients present at the input by disabling the once used input for the filter time t. 2. propagation delay time measurement of input to output response; step change v in() from 0 to 10 v. measure the time required for v o < 1.5 v. 3. t sdp = (v ca1 v ca2 ) x ca/i ca4 ; ca = 0.1 m f. 4. t sdn = [(v ca1 v ca2 ) x ca/i ca5 ] + t 1 ; ca = 0.1 m f. 5. t sod = (v cs1 v cs2 ) x cs/i cs1 ; cs = 0.1 m f. 6. t ssd = (v cs1 v cs2 ) x cs/i cs3 ; cs = 0.1 m f. 7. t sst = (v cs1 v cs2 ) x cs/i cs2 ; cs = 0.1 m f. 8. f ss = 1/[(5.4/v in(+)(th) ) + (4.3/i cs4 ) + (2/i cs2 )] x cs; cs = 0.1 m f. 9. t bit = [(v cs 0.7 v)/i cs1 ] x cs; cs 0.1 m f. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . mc33094 7 motorola analog ic device data electrical characteristics (continued) (characteristics noted under conditions 6.0 v v d = v cc 16 v, 40 c t a 125 c, unless otherwise noted. typical values are specified for t a = 25 c.) characteristic unit max typ min symbol timing stall shutdown time t sst 13.6 20.9 26.5 ms (data from i cs2 , v cs1 , v cs2 ) (note 7) stall frequency (note 8) f s 1.69 2.26 2.8 hz battery interrupt time (v cc = v in() = v st = 0 v, t bit 25 66.65 200 ms v ca = v cr = open, v cs = 6.0 v) (note 9) notes: 1. measure time until v o > 0.2 v. the negative edge filter prevents multiple output sparks caused by switching transients present at the input by disabling the once used input for the filter time t. 2. propagation delay time measurement of input to output response; step change v in() from 0 to 10 v. measure the time required for v o < 1.5 v. 3. t sdp = (v ca1 v ca2 ) x ca/i ca4 ; ca = 0.1 m f. 4. t sdn = [(v ca1 v ca2 ) x ca/i ca5 ] + t 1 ; ca = 0.1 m f. 5. t sod = (v cs1 v cs2 ) x cs/i cs1 ; cs = 0.1 m f. 6. t ssd = (v cs1 v cs2 ) x cs/i cs3 ; cs = 0.1 m f. 7. t sst = (v cs1 v cs2 ) x cs/i cs2 ; cs = 0.1 m f. 8. f ss = 1/[(5.4/v in(+)(th) ) + (4.3/i cs4 ) + (2/i cs2 )] x cs; cs = 0.1 m f. 9. t bit = [(v cs 0.7 v)/i cs1 ] x cs; cs 0.1 m f. * 7;@6 #%)(# ( *( &' $!* ( ("%&()& figure 3. input positive threshold voltage versus temperature * * * * * * figure 4. input negative threshold voltage versus temperature * 7;@6 #%)(%$' ( *( &' $!* * * * * ( ("%&()& figure 5. output current change versus temperature * 7; $=3; * * %7; * . * 7; figure 6. input impedance versus temperature ( ("%&()& $ $)(%)()&&#( # d * $ 4><: @< * . #%)( "%#8 w ( ("%&()& * '( * * '( * * '( * * ' * * * & $=3; * '( * * * & * ' $=3; f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . mc33094 8 motorola analog ic device data * $ * ! : figure 7. output clamp voltage versus temperature figure 8. output clamp dynamic impedance versus temperature * $ * ! : d ! : . ! d * ! d ! ( ("%&()& ( ("%&()& * ! $)(%)(!"%*$!( * . ! $)(%)(!"%-#" "%# w figure 9. supply drain current versus temperature * 7; * * * * * ( ("%&()& ')%%!-)&&#(: block diagram description (figure 10) the bandgap reference generates a nominal 1.2 v having very good stability with temperature variations. the bandgap reference conceptually provides a low temperature drift voltage by summing a strongly negative temperature coefficient (tc) voltage with an equally strong positive tc voltage. the negative tc voltage element is a result of a transistor emittertobase voltage while the positive tc voltage is developed as a result of a positive tc current imposed across a resistor. the positive tc current relies on the matching of currents in different sizes of transistors. the result is a very stable reference voltage independent of temperature variations. the bandgap reference voltage provides a thermally stable voltage reference for critically sensitive circuits within the ic. it also sets the master bias current for all precision currents on the ic. the v r zener reference block contains a 6.75 v zener regulator, which also exhibits a very low temperature coefficient. the v cc comparator and clamp block limits the v cc voltage to one v be plus three zener drops in addition to comparing the v cc voltage to 15 and 22 v. when the v cc voltage is greater than either of these two values, the ic changes the adaptive capacitor discharge rate and when above 22 v the ic forces the coil current to shutdown. the minimum v cc value the ic will operate at is 4.0 v and v bat of 5.0 v. below 7.5 v, the v r reference is no longer maintained, and the ic consumes excess power and excess voltage is dropped in the external v cc resistor. the master bias current reference block generates precise currents used throughout the ic. the mb pin is held at 1.2 v by a differential amplifier with feedback. capacitive loading on the mb pin reduces the effectiveness of the internal dominant pole, and loading as modest as 200 pf may cause the differential amplifier to oscillate. the input voltage comparator block requires an input signal between ground and v bat and detects the swing in the input signal. the thresholds for the input comparator are approximately 56.2% of v bat for rising signals and 36% of v bat for falling signals. the input signal may come from a hall effect sensor or reluctor sensor on the distributor. the negative edge filter block is an inverting buffer for the signal from the input voltage comparator and has a time constant of approximately 0.1 m s for rising edges and 500 m s for falling edges. the adaptive capacitor charging and sensing block charges, discharges, and senses the adaptive capacitor voltage. the adaptive capacitor has a single charge rate of 8.4 m a and two discharge rates. the 1.688 m a slow discharge rate is used only during very high v cc operation and f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . mc33094 9 motorola analog ic device data represents an effort to reduce excess dwell and therefore power dissipation during high voltage operation. the 5.88 m a discharge rate is used under normal v cc operating conditions. under a start mode, this block will discharge the adaptive capacitor forcing an enhanced start mode dwell. the start/run modes are set internally by detecting the engine frequency, which corresponds to the ramp capacitor voltage. the stall capacitor charging and sensing block controls the charging and discharging rates of the stall capacitor. the charging rate is 31.5 m a, and the two discharging rates are 1.0 m a and 7.0 m a. the stall capacitor potential commands the ic to maintain or reduce the coil current. when the engine is turning very slowly (or stalled), the stall capacitor will have enough time to discharge below threshold and thereby reduce coil current. the output current limiter (see output current driver and limiter block description below) forces the coil current to be proportional to the stall capacitor voltage when the stall capacitor voltage is less than 2.0 v. the ramp capacitor charging and sensing block charges the ramp capacitor at approximately 8.4 m a and discharges it at about 33.6 m a. the charging circuit is always on and sources current during the anot 25%o part of the engine cycle. the discharging circuit is only on and sinking current during the a25%o part of the engine cycle. the positive edge of the distributor input signal sets the 25% mode, and the ramp comparator output clears this mode. the cr > ca adaptive comparator block signals the point where the ramp capacitor voltage is greater than the adaptive capacitor voltage. the point at which the two capacitor voltages are equal is the point where charging of the coil is begun. the adaptive algorithm used in the ic maintains the required excess dwell throughout all reasonable accelerations and decelerations without causing excess coil power dissipation, in addition, it insures that more than adequate spark energy is available for very high engine speeds, when excess dwell is impossible. the output current driver and limiter block sources a limited supply current of about 50 ma to the base of the darlington power transistor. the darlington will cause the coil to conduct to about 6.5 amps and the voltage drop on the is pin of the ic will rise to the threshold of the current limiter. the current limiter will then hold the coil current at that level until either a spark is commanded by the logic block, or the engine begins to stall (causing the coil to slowly discharge). the internal logic block performs the required memory and gating functions on the ic to implement the adaptive ignition control algorithm. /;2 /= &343>3;13 ;=a@ *<9@/53 <:=/>/@<> #35/@7b3 253 79@3> &/:= /=/17@<> 6/>57;5 /;2 '3;?7;5 2/=@7b3 /=/17@<> 6/>57;5 /;2 '3;?7;5 & 2/=@7b3 <:=/>/@<> * <:=/>/@<> /;2 9/:= ' $a@ ' ! ' * " * > ;2 * > "/?@3> 7/? * 7; & & * > "/?@3> 7/? &3?3@ * > "/?@3> 7/? * * > &3?3@ . '@/99 & '@/99 '( ( 7/@ '@/99 !7:7@ a:= "/?@3> 7/? a>>3;@ &343>3;13 * > .3;3> &343>3;13 $a@=a@ a>>3;@ >7b3> /;2 !7:7@3> ;@3>;/9 !<571 '@/99 /=/17@<> 6/>57;5 /;2 '3;?7;5 figure 10. block diagram c399 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . mc33094 10 motorola analog ic device data * 7; '+ 5;7@7<; * 0/@ "/?@3> 7/? /;2 /= &343>3;13 * 9/:= /;2 .3;3> &34 ;=a@ <:= /;2 #35/@7b3 253 79@3> $a@=a@ a>>3;@ >7b3> /;2 !7:7@3> '@/99 /=/17@<> 2/=@7b3 /=/17@<> &/:= /=/17@<> & <:=/>/@<> ;@3>;/9 !<571 & ' * 7; '( ( 8 * 8 + m 8 8 figure 11. typical ignition circuit " * m m $a@ ' m m ) " <> " introduction the mc33094dw is designed for engine compartment use in 12 v automotive ignition applications to provide high performance control of the ignition coil when used with an appropriate motorola power darlington transistor. engine control systems utilizing these devices for ignition coil control exhibit superior fuel efficiency and lower exhaust emissions over predecessor systems. the device is designed for single input control from a hall sensor to determine crankshaft position. the device, a bipolar linear integrated circuit, is built using highdensity integratedinjection logic (iil) processing incorporating high currentgain pnp and npn transistors. all module inputs are transient voltage protected through the use of resistors, capacitors, and/or zener diodes working in conjunction with internal protection elements. these elements provide protection of critical circuitry from externally induced highvoltage transients which may degrade the devices operational performance. at the module level, it is recommended the v cc pin of the device be transient decoupled using an external resistor and capacitor to work in conjunction with the onchip internal zener string to provide robust module protection of the device power pin. the d input of module should be protected from transients through the use of an external resistor and zener diode. the start wire of the module should be decoupled through the use of two resistors and a capacitor to work in conjunction with the onchip internal clamp (figure 11). the output of the device incorporates a high currentgain pnp designed to drive an external power darlington transistor to provide control of the ignition coil. the output drive is carefully synchronized with the output from the distributor. the charging and discharging of three capacitors, external to the device, provide timing signals which program the dwell and charge time control of the ignition coil over a wide rpm range. the timing and charge/discharge rates of the three external capacitors are accurately controlled by internal circuitry acted upon by sensor and distributor signal detection of the device. a feedback path from the emitter of the external power darlington transistor to the device provide monitoring of the ignition coil current. an internal comparitor of the device senses and limits the maximum ignition coil current to approximately 6.5 amps. other circuitry within the device provides an interruption of the coil current so as to generate the spark, or slowly discharges the coil in a controlled manner so as to prevent a spark and limit the total module energy dissipation. when the external darlington is switched off, the darlington collector will instantly experience a dramatic increase in voltage as a result of the collapsing field of the ignition coil (inductive kick). the external voltage divider working in conjunction with the internal device zener string and power pnp form a dynamic clamp which limits the inductive kick voltage to less than 350 v. this feature protects the darlington transistor from damaging stress or breakdown. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . mc33094 11 motorola analog ic device data ignition circuit operation description when initially powered up, all module capacitors start discharged (0 v). the v cc capacitor will power up first, and the ic's internal logic latches are indeterminate. the following conditions will hold: stall = 1, because the stall capacitor voltage is less than 2.0 v; 25% = 0, because the ramp capacitor is less than the band gap reference voltage (v bg ); and i coil = 0 amps, because the stall capacitor is at 0 v. because 25% = 0, the ramp capacitor charges towards v r . at cranking frequencies, the ramp capacitor always exceeds the start mode threshold at the input (zc), and therefore the stall signal resets the start mode latch upon the first ac signal (this causes the adaptive capacitor to be discharged). with the adaptive capacitor held low, very high rates of acceleration are possible. if the adaptive capacitor were allowed to adapt the dwell at low frequencies, severe limitations to engine acceleration would occur. see figure 13. at point a, a spark from the previous cycle occurs as the field around the coil collapses rapidly. at the same time zc (zc (input) = high(1)) will set the 25% clock signal which commands the adaptive and ramp capacitors to discharge and the stall capacitor to charge. at point b, as the ramp capacitor voltage crosses the 1.2 v (v bg ) level, the 25% clock is cleared and the polarities and amplitude of the ramp and stall capacitor currents change to their appropriate levels. at this point the adaptive capacitor is discharged and begins to float. at point c, the coil turns on and ramps until the coil current is limited to 6.5 amps. the adaptive capacitor, at point d, remains discharged and the dwell is maximized to 6.5 amps because the start/run latch has yet to be set. at point e, zc (zc = high) turns the coil off causing a spark to occur and at which point a new cycle begins. as the engine frequency increases, the peak voltage on the ramp capacitor at the ac signal will fall below the start mode enable threshold level. the start mode enable detector then sets the start/run latch to the run mode (ca dump = 0) by clocking a zero into the start/run latch at the zero cross. at this time the adaptive algorithm is evoked and the adaptive capacitor is allowed to charge and discharge according to it's other logical inputs. after normal run mode operation is entered, the start mode may not be reentered even though the ramp capacitor voltage again exceeds the start mode enable threshold. a start mode may only be evoked by a stall signal transition from logic 1 to 0. the stall signal transition occurs at a zc frequency of approximately 2.0 hz. the ic and circuit provides for other than normal starting procedures such as push starting the engine. since the stall capacitor will be discharged in this low frequency mode, the ic will provide a spark timing with a maximum retardation of about 6.5 ms. after the start mode operation is exited, the normal operation algorithm is entered and a different sequence of events dominate the ic's performance. see figures 14, 15, and 16. at point a, the spark from the previous cycle occurs and the 25% part of the cycle begins. during this part of the cycle, the stall capacitor will charge and the ramp and adaptive capacitors will discharge. at point b, the anot 25%o part of the cycle, also called the 75% part of the cycle, begins. the stall capacitor discharges, while the ramp capacitor charges. during this part of the cycle the adaptive capacitor floats. at point c, the ramp capacitor voltage equals the voltage on the adaptive capacitor. at this time, the coil turns on and the coil current ramps to the point where it is limited. when the coil current reaches the limit, point d, the adaptive capacitor begins to charge, until zero cross (zc = 1logic(high)), point e. this turns the coil off and induces a spark. the 75% part of the cycle lasts until point e, at which time the cycle begins again. the adaptive dwell algorithm causes the engine to maintain a fixed percent of excess dwell time (if possible). the mechanism that permits this involves the floating nature of the adaptive capacitor. during engine deceleration, the initial coil turnon might occur early, but the next coil turnon will be retarded to it's correct location due to the % adjusted adaptive capacitor charge time. during acceleration, the coil may not charge up as early as desired the first time, however, the spark will still be correctly slaved to the distributor. the side ef fect of this is that the adaptive capacitor will not receive as much charge time for that cycle and will have a lower average value the next cycle, thus starting the coil charging sooner, as can be seen in figure 16. in this figure, the output voltage rises before the adaptive capacitor charge signal occurs. see figure 12. in the stall mode the output is slaved by the stall capacitor. the stall capacitor can discharge completely, but starting at point x it charges during the 25% of the engine cycle (duration of when zc is logic high = 1). at the same time a spark from the previous cycle occurs. the dwell signal will be high as long as the engine is in stall, but falls gradually preventing a spark at point y when the stall goes low starting at 2.4 v. the coil will be slaved to the stall capacitor, and at point z the coil will charge to 6.5 amps as the stall capacitor charges to 2.0 v. at that time the stall comparator will trip (stall = 0) and the dwell signal will fall, triggering a reduced spark with some retardation (6.5 ms). at this point a new cycle begins. each of the three different modes (stall, start, and run) have their own differences. the stall capacitor controls the output in the stall mode, however is disabled in both the start and run modes. the output is clamped longer in the start mode as compared to the run mode due to the more energy/current in the coil causing a longer/bigger spark. other less likely operating sequences are possible. for example, there is a possibility of v cc exceeding 15 v during engine operation (high battery = logic 1). above about 17 v on v bat , the excess current limit percentage falls to 5% to conserve ic and circuit power dissipation. above 25 v, current to the coil is disabled. care was placed in this design to account for all possible operating modes. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . mc33094 12 motorola analog ic device data * * * * :* * * * * * * * :* * 7; %7; * mc33094 13 motorola analog ic device data * * * * * * * * * * * * * 7; %7; * * d193 d193 * * & f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . mc33094 14 motorola analog ic device data * 7; %7; * * * * * * * * * * figure 15. run mode 2000 rpm (frequency: 66.67 hz @ 5.0 ms) * * * * * * * * * * * * * * 7; %7; * ' " ' ( h x 45 " " h 8x e b a e t a1 a l c #$(' "#' $#' & # " !! "(&' #(&%&( "#' $#' # ($!&#' %& '" - " "#' $#' # $ #$( #!) "$! %&$(&)' $# ", ")" "$! %&$(&)' $# %& ' "#' $# $' #$( #!) "& %&$(&)' $# !!$+! "& %&$(&)' $# ' !! ($(! # ,'' $ ( "#' $# ( ", ")" "(& ! $# ( $# ' f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . mc33094 16 motorola analog ic device data 0 motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, represe ntation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the applicati on or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. atypicalo parameters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operatin g parameters, including at ypicalso must be validated for each customer application by customer's technical experts. motorola does not convey any license under it s patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical imp lant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a s ituation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expens es, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motoro la, inc. motorola, inc. is an equal opportunity/affirmative action employer. how to reach us: usa/europe/locations not listed : motorola literature distribution; p.o. box 5405, denver, colorado 80217. 13036752140 or 18004412447 japan : motorola japan ltd.; sps, technical information center, 3201, minamiaz abu. minatoku, tokyo 1068573 japan. 8 1334403569 asia/pacific : motorola semiconductors h.k. ltd.; silicon harbour centre, 2 dai king street, tai po industrial estate, tai po, n.t., hong ko ng. 85226668334 technical information center: 18005216274 home page : http://www.motorola.com/semiconductors/ mc33094/d ? f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . |
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